Abstract：HDMI is the first digital interface to transmit uncompressed digital high-definition video，multi-channel audio and control command data packets over a single cable.It meets the application requirements of high-definition multimedia at present and develops rapidly.The paper analyzes coding principle of HDMI transmission through the basic structure，video data transmission，audio data transmission，and control packet transmission.
1. Introduction
With the continuous improvement of living standards, people’s demand for audio-visual enjoyment is getting higher and higher. Digital audio and video interfaces have gradually replaced analog audio and video interfaces and become the mainstream of consumer electronics. Based on the DVI interface, the HDMI interface adds audio transmission and digital content copyright protection, and greatly improves the transmission rate, gradually becoming the main transmission technology for digital video. Therefore, the research on HDMI interface technology has great commercial value and social significance.
2.HDMI Basic Structure
The basic structure of the HDMI system consists of a transmitter and a receiver, as shown in Figure 1. The HDMI interface contains three independent data channels: TMDS (Transition Minimized Differential Signal) channel, DDC (Display Data) channel, and CEC (Consumer Electronics Control) channel. The TMDS channel mainly transmits audio and video data and auxiliary data. The data transmission of the TMDS channel, as the main part of HDMI transmission, is the focus of this article.
The TMDS channel includes three sets of differential data signals and one set of differential clock signals, which constitute the data channel and clock channel for transmitting video data, audio data and auxiliary information data. Normally, the TMDS clock works on the video pixel clock, and it serves as the reference frequency for recovering the contents of the three TMDS data channels at the receiving end.
At the transmitting end, TMDS encoding converts 8-bit TMDS video data into a 10-bit DC balanced differential signal with minimum variation transmission. Each video pixel can be represented by 24, 30, 36 or 48 bits before encoding. By default, the pixel clock frequency of 24-bit color depth video is equal to the TMDS clock frequency, and the transmission of video with higher color depth requires a corresponding increase in the TMDS clock frequency. HDMI transmits audio and auxiliary information data in the form of data packets in the TMDS channel.
The DDC channel works according to the standard I2C protocol. The high and low levels of the signal are 5V and 0V. It is used by the transmitter to read the EDID (Extended Display Identification Data) data of the receiver.
The EDID data mainly contains the video resolution information and audio format information that the receiver can support. In order to achieve plug-and-play function, the transmitter can automatically change the audio and video format sent by reading the EDID information of the receiver.
The high-bandwidth digital content protection function HDCP also relies on the DDC channel to exchange keys to implement the encryption and decryption process to achieve the purpose of audio and video content protection.
Although the copyright protection function is a requirement of HDMI, the HDCP protocol is independent of HDMI. Due to space limitations, this article will not discuss it. The CEC channel is mainly to interconnect multiple multimedia sending and receiving devices to achieve one-key control function. The CEC channel is an optional function of the HDMI protocol and is not yet widely used.
3. HDMI data encoding and transmission
The HDMI link includes three working modes: video data cycle, data island cycle, and control cycle. The valid pixels of the valid video line are transmitted in the video data cycle. Audio and auxiliary data and error correction codes are transmitted in the data island cycle in the form of multiple data packets. When there is no video, audio or auxiliary data to transmit the control cycle, the control cycle is used to indicate whether the next cycle is a video data cycle or a data island cycle. Therefore, a control cycle must be transmitted between any two non-control cycles.
Before HDMI encoding, each TMDS channel contains 8-bit video data, 4-bit audio data packets, and 2-bit control data. These data are expanded to 10 bits according to different encoding methods during HDMI encoding. Figure 2 is a schematic diagram of the data in three data channels before encoding.
3.1 HDMI Video Data Cycle
As mentioned above, video transmission mainly occurs in the video data cycle. The first two TMDS clock cycles in each video cycle are called the Leading Guard Band as the front guard band of the video data cycle. In the video cycle, the front guard bands of the three TMDS channels have their specific values. This value exists in 10-bit form together with the encoded video data, and there is no 8-bit data before encoding, as shown in Table 1:
After the front guard band, the encoded video data begins to be transmitted. Video data encoding converts 8-bit video data into 10 bits, and then transmits it in the video data cycle. First, the 8-bit character is encoded with the previous 1 bit through “XOR” or “XOR-N” with the smallest change, while the lowest bit remains unchanged. Then, the encoding indicator bit is added to generate a 9-bit character (the actual “XOR” or “XOR-N” is determined by the number of “1” contained in the 8-bit data.
The 9th bit indicates which transformation method is used. 0 indicates “XOR-N” and 1 indicates “XOR”). Then, according to the number of 0s and 1s of the data that have been transmitted and the number of 0s and 1s of the data to be transmitted, it is decided whether to invert the 8 data bits in the 9-bit information generated in the first step (if more 1s have been transmitted and the current data has more 1s than 0s, then invert), and transform it into a 10-bit DC balanced code (the 10th bit indicates whether it has been inverted, 1 indicates inversion, and 0 indicates no inversion). Finally, the encoded data is serialized and sent serially in differential form on the TMDS channel.
3.2 HDMI Data Island Cycle
The data island period is used to transmit audio sampling data and auxiliary data. Auxiliary data includes information packets and other data packets that describe whether the video or audio is valid or not. Similar to the video data period, the data island period starts with a leading guard band, followed by the first data packet of the data island period.
The difference from the video data period is that the data island period ends with a trailing guard band, while the video data period does not have a trailing guard band. In the data island period, the Guard Band of data channels 1 and 2 also has its specific value, and the position corresponding to data channel 0 is not encoded according to the Guard Band. See Table 2 for details:
In each TMDS clock cycle (including two Guard Bands) of the data island period, the 0th and 1st bits of data channel 0 transmit the encoded HSYNC and VSYNC. The 2nd bit of signal data channel 0 is used to transmit the data packet header, and the lower four bits of data channels 1 and 2 are used to transmit data packets. Each data packet has a length of 32 pixels and is error corrected and detected by the BCH error correction code. In the data island period, the three TMDS channels are transmitting a series of 10-bit data encoded by 4-bit input data, using the error reduction code TERC4. As shown in Table 3:
3.3 HDMI Control Cycle
The control cycle transmits the guide data and is also used for character synchronization at the receiving end. Each TMDS channel transmits two bits of control information, as shown in Table 4:
CTL0-CTL3 are used to indicate whether the next transmission is a video data cycle or a data island cycle. Only the following two values are valid, and the others are illegal values, as shown in Table 5:
The 10-bit data obtained by encoding the 2-bit control data is shown in Table 6:
The TMDS receiver needs to determine the location of the data boundary in a series of serial data. Once the boundary characters in the data channel are determined, the receiver will synchronize the serial data stream accordingly and decode the data stream transmitted by the TMDS channel. In the video data cycle and data island cycle, 10-bit encoded data contains 5 or fewer conversions, while in the control cycle it contains 7 or more conversions. Coded words with more content conversion times are transmitted in the control cycle and become the basis for character synchronization on the decoder side.
4. HDMI Video Formats
Video format support is an important aspect that consumer electronics manufacturers are competing to improve. This section discusses the video formats supported by HDMI devices from the following three aspects: pixel encoding, color depth, and video resolution.
In terms of pixel encoding, HDMI supports three methods: RGB444, YUV422, and YUV444, and RGB444 is a required method, while the other two are optional. If the HDMI receiving or transmitting device can support YUV422 or YUV444 with analog component video or digital video, then the HDMI transmitting or receiving end is required to support the corresponding format, and the HDMI receiving end must support both YUV422 and YUV444 at the same time.
In terms of color depth, all HDMI devices must support 24-bit color depth requirements. Color depths exceeding 24 bits are called deep color mode, and 30-bit, 36-bit, and 48-bit color depths are optional for HDMI devices. If an HDMI device supports deep color mode, it must first support 36-bit color mode. For 24-bit color mode, the TMDS clock cycle is equal to the video pixel cycle, while in deep color mode, the TMDS clock cycle is a multiple of the video pixel cycle.
In terms of video resolution, the HDMI transmitter must support at least one of 640*480p@60Hz, 720*480p@60Hz, and 720*576p@50Hz. If the HDMI transmitter can support any of the six resolutions of 1920*1080i@60Hz, 1280*720p@60Hz, 1920*1080i@50Hz, 1280*720p@50Hz, 720*576p@50Hz, and 720*480p@60Hz with analog component video or digital video, then the HDMI transmitter is required to support the corresponding resolution.
For HDMI receivers, it is required to support 640*480p@60Hz. In addition, the supported pixel encoding method, color depth and video resolution must be indicated in the EDID information for HDMI transmitters to identify.
5.Conclusion
Due to space limitations, this article cannot provide a detailed introduction to all the contents of the HDMI system. It mainly analyzes HDMI transmission from the perspective of its overall structure and various data encoding and decoding methods, so that readers can have an intuitive and definite understanding of the content represented by the signal at each moment in the HDMI transmission process. This is the most difficult to understand and the most important part in the HDMI design process.
Commonly used HDMI transmitters can support three pixel encoding formats: RGB444/YUV422/YUV444 and 24-bit color depth. In terms of resolution, in addition to supporting the standard resolutions specified by HDMI such as 1920*1080p@60Hz, 1920*1080p@30Hz, 1920*1080p@25Hz, 1920*1080i@60Hz, 1920*1080i@50Hz, 1280*720p@60Hz, 1280*720p@50Hz, 720*480p@60Hz, 720*576p@50Hz, 720*480i@60Hz, 720*576i@50Hz, 640*480p@60Hz, 640*480i@60Hz, it also supports other resolutions such as 1024*768p@60Hz and 1280*768p@60Hz.
References:
[1] Hitachi Ltd., Panasonic Corporation., Philips Consumer Electronics, International BV, Silicon Image Inc., Sony Corporation, Technicolor SA, Toshiba Corporation, High-Definition Multimedia Interface Specification Version 1.4a, www.hdmi.org.